1. Field of Technology
The present invention relates to memory apparatuses provided with cache memory that caches data stored in auxiliary storage apparatuses, to cache control methods used in such memory apparatuses, and to cache control programs used in information processing apparatuses.
2. Description of Related Art
Since the access speed of auxiliary storage apparatuses such as hard disk drives (HDD), etc. is slow compared to that of the main memory, usually they are accessed via a disk cache (cache memory) to which high speed access can be made. There are the write through method and the write back method in the common disk caches used for these auxiliary storage apparatuses.
As is shown in FIG. 10(A), in the write through method, immediately after writing the data to be written in the hard disk drive 200 in the write through cache 201, the data of the write through cache is written in the hard disk drive 200 (arrow Da), and the control is returned to the higher level after writing to the hard disk drive 200 is ended (arrow Db). Because of this, although the higher level is made to wait until the writing to the hard disk drive is completed, the interval of time during which the content of the disk cache and the content of the hard disk drive being different becomes short, and even when an unexpected power failure occurs, it becomes rare for the data of the hard disk drive becoming incomplete.
As is shown in FIG. 10(B), in the write back method, the control is returned to the higher level (arrow Dc) at the instant that the data to be written to the hard disk drive 200 is written in the write back cache 202, and the writing of data from the write back cache 202 to the hard disk drive 200 (arrow Dd) is done at a different timing. For example, the writing is done periodically at prescribed intervals, or else, the writing is done at the timing when the usable area is exhausted in the disk cache. Because of this, although the higher level is not made to wait until the writing to the hard disk drive is completed, the interval of time during which the content of the disk cache and the content of the hard disk drive being different becomes long, and if a power failure occurs, the possibility of the data of the hard disk drive going into the incomplete state becomes high.
In image, processing using an auxiliary storage apparatus via such a disk cache, because the access speed of the auxiliary storage apparatus has a large effect on the overall performance of the apparatus, in order to improve the performance it is effective to reduce the number of accesses to the auxiliary storage apparatus by using the write back method for the disk cache, thereby making sure that the data on the disk cache is not sent to the auxiliary storage apparatus as far as possible. However, since the data in the disk cache is normally erased when the power supply is switched off, if the period over which the data on the disk cache is not saved to the auxiliary storage apparatus becomes long, as has been explained above, the possibility of occurrence of inconsistency in the data due to power supply breaks (power supply ON/OFF) becomes high.
In view of this, there is a technology of ensuring safety of data towards power supply breaks while using a cache memory of the write back method by starting a back up power supply in the event of a break in the power supply, and writing the data in the cache memory to the auxiliary storage apparatus or saving it in a non-volatile memory (see, for example, Japanese Unexamined Patent Application Publication No. H7-44982 (JPA7-44982)).
Further, there is a technology of improving the performance of accesses themselves by providing a plurality of cache memories having different configurations with respect to the same storage medium, and by selecting the logical configuration (for example, the block size or the number of ways) of the cache memory according to the content of the data (see, for example, Japanese Unexamined Patent Application Publication No. 2002-7213 (JPA2002-7213)).
The data handled by an image processing apparatus has image data and control data, and the methods of handling these two types of data are largely different from each other. Therefore, if accesses are made using the same cache memory, sufficient caching effect will not be obtained.
For example, the image data is the bit map data of the image or the bit map data compressed using a prescribed algorithm. The control data is the data other than the image and is required to be stored for carrying out image processing, and for example, the following are included in the control data.
(A) Control Data of Internal File System
                FAT (File Allocation Table)        Directory file(B) Control Data Used by the Program of the Image Processing Apparatus        Information for controlling the image data (storage location of the image data, image parameters, etc.)        Information related to the job under execution        Various settings information        Address book        User account information        Job history information        
Further, as is shown in FIG. 11, the modes of accessing these image data and control data are widely different from each other.
In detailed terms, in the case of image data, the volume of data accessed successively is from a few kilobytes to several tens of megabytes, the access frequency is continuous, the frequency of repeated accesses to the same block becomes low, and the effect is small when there is a hit in the cache (not expected). In addition, the guarantee of data regarding unexpected power failures is not necessary for image data since the power failure counter measures are taken for the control data.
On the other hand, in the case of control data, the volume of data accessed successively is from a few bytes to several tens of kilobytes, the frequency of accesses is irregular and scattered, the frequency of repeated accesses to the same block becomes high, and the effect is large when there is a hit in the cache. In addition, it is necessary to guarantee the data regarding unexpected power failures.
Regarding the two types of data with different access modes as described above, in the configuration in which there is only one configuration of the cache memory as described in JPA7-44982 above, the following problem occurs when simultaneous accesses are present via a single (or the same) cache memory.
Since repeated accesses to the same block are large in the case of control data, the effect is large when there is a hit in the cache. However, if accesses of image data are also made at the same time, most of the area of the cache memory will be consumed by the image data, and the rate of hit of control data in the cache memory becomes extremely low. If the cache hit rate of control data decreases, accesses of control data occur asynchronously during the successive accesses of image data, and hence performance decrease occurs due to seeking operation of the head in the case of a hard disk drive.
If an attempt is made to counter these problems by merely making the cache size large, a large increase will be required in the cache memory capacity that can be saved to a non-volatile memory thereby increasing the cost. Further, although it is possible to store the image data and the control data respectively in different auxiliary storage apparatuses, the cost increases because of the increase in the number of auxiliary storage apparatuses.
Further, in the technology of JPA2002-7213, although improvement in performance is being aimed at by selecting accessing a plurality of cache memories for a plurality of information processings, no considerations have been given to protecting data against power supply breaks.
The present invention was made in order to solve the above problems, and the purpose of the present invention is to provide a memory apparatus, a cache control method, and a cache control program using which it is possible to increase the speed of processing by decreasing the accesses to the auxiliary storage apparatus and to aim at protecting the data against power supply breakdowns.